Digilent Spartan-3 Starter Kit Board Tutorial

VGA Test

The purpose of this VGA test project is to exercise how to "draw color  pixels" on computer monitors using Digilent Spartan-3 Starter Kit Board. The VGA resolution in this test will be 8-color 640x480@25 MHz 60 Hz refreshing rate. Each pixel is represented using 3 bits (8 colors). If everything goes well, the monitor will display a single-color "wash" with color change at 1 Hz rate.

To exercise this tutorial you will have to have the following hardware and software:

Hardware: Digilent Spartan-3 Starter Kit Board
Software: Xilinx ISE 8.1.03i

Step 1: Get the compressed project ball and uncompress it in a place you know where to get it.
Step 2: Start Xilinx ISE 8.1.03i and open the above project using project navigator.
Step 3: Double click Generate Programming File in the Processes window. (Skip this step if you don't want to re-complile the projet.)
Step 4: Start iMPACT and choose the programming file  vgatest.bit for XC3-S200.
Step 5: Right click on XC3-S200 in IMPACT and choose program...

Have fun!

--------------------------------------------------------------------------------
-- Company: Department of Computer Science, University of Texas at San Antonio
-- Engineer: Chia-Tien Dan Lo (danlo@cs.utsa.edu)
--
-- Create Date: 11:01:23 08/20/06
-- Design Name: 
-- Module Name: vgatest - behavioral
-- Project Name: 
-- Target Device: Xilinx Spartan 3 xc3s200 on Digilent Spartan-3 Starter Kit Board
-- Tool versions: ISE 8.1.03i 
-- Description: This VGA test will draw a single color page and change color
-- every one second. VGA resolution is 640x480 @25 MHZ 8 colors
-- Dependencies:
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
-- Pin Assignment:
-- MET clk50_in loc = T9
-- NET red_out LOC=R12; 
-- NET green_out LOC=T12;
-- NET blue_out LOC=R11;
-- NET hs_out LOC=R9; 
-- NET vs_out LOC=T10; 
--------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity vgatest is
port(clk50_in : in std_logic;
red_out : out std_logic;
green_out : out std_logic;
blue_out : out std_logic;
hs_out : out std_logic;
vs_out : out std_logic);
end vgatest;

architecture behavioral of vgatest is

signal clk25 : std_logic;
signal hcounter : integer range 0 to 800;
signal vcounter : integer range 0 to 521;
signal color: std_logic_vector(2 downto 0);
begin

-- generate a 25Mhz clock
process (clk50_in)
begin
if clk50_in'event and clk50_in='1' then
clk25 <= not clk25;
end if;
end process;

-- change color every one second
p1: process (clk25)
variable cnt: integer;
begin
if clk25'event and clk25='1' then
cnt := cnt + 1;
if cnt = 25000000 then
color <= color + "001";
cnt := 0;
end if;
end if;
end process;

p2: process (clk25, hcounter, vcounter)
variable x: integer range 0 to 639;
variable y: integer range 0 to 479;
begin
-- hcounter counts from 0 to 799
-- vcounter counts from 0 to 520
-- x coordinate: 0 - 639 (x = hcounter - 144, i.e., hcounter -Tpw-Tbp)
-- y coordinate: 0 - 479 (y = vcounter - 31, i.e., vcounter-Tpw-Tbp)
x := hcounter - 144;
y := vcounter - 31;
if clk25'event and clk25 = '1' then
-- To draw a pixel in (x0, y0), simply test if the ray trace to it
-- and set its color to any value between 1 to 7. The following example simply sets 
-- the whole display area to a single-color wash, which is changed every one 
-- second. 
if x < 640 and y < 480 then
red_out <= color(0);
green_out <= color(1); 
blue_out <= color(2);
else
-- if not traced, set it to "black" color
red_out <= '0';
green_out <= '0';
blue_out <= '0';
end if;
-- Here is the timing for horizontal synchronization.
-- (Refer to p. 24, Xilinx, Spartan-3 Starter Kit Board User Guide)
-- Pulse width: Tpw = 96 cycles @ 25 MHz
-- Back porch: Tbp = 48 cycles
-- Display time: Tdisp = 640 cycles
-- Front porch: Tfp = 16 cycles
-- Sync pulse time (total cycles) Ts = 800 cycles

if hcounter > 0 and hcounter < 97 then
hs_out <= '0';
else
hs_out <= '1';
end if;
-- Here is the timing for vertical synchronization.
-- (Refer to p. 24, Xilinx, Spartan-3 Starter Kit Board User Guide)
-- Pulse width: Tpw = 1600 cycles (2 lines) @ 25 MHz
-- Back porch: Tbp = 23200 cycles (29 lines)
-- Display time: Tdisp = 38400 cycles (480 lines)
-- Front porch: Tfp = 8000 cycles (10 lines)
-- Sync pulse time (total cycles) Ts = 416800 cycles (521 lines)
if vcounter > 0 and vcounter < 3 then
vs_out <= '0';
else
vs_out <= '1';
end if;
-- horizontal counts from 0 to 799
hcounter <= hcounter+1;
if hcounter = 800 then
vcounter <= vcounter+1;
hcounter <= 0;
end if;
-- vertical counts from 0 to 519
if vcounter = 521 then 
vcounter <= 0;
end if;
end if;
end process;

end behavioral;