CS 2734
Computer Organization II
In this laboratory you will be writing code to simulate the register file and the ALU shown in PH Figure 5.6. Each will be implemented as a function in C. (You may also use C++ or Java if you wish.)
In each case there should be a header file with the function prototype (and any related function prototypes) and a souce file with the code to implement the function. The header files are given below and can be used as is. You need to supply code for simple driver programs to test each component separately.
/* mipsALU.h: header file for the ALU simulation function */
void ALU(unsigned int ALUin1, unsigned int ALUin2, unsigned int ALUcontrol,
unsigned int *ALUresult, unsigned int *ALUZero);
/* ALU function: simulate MIPS ALU
* Inputs:
* ALUin1: first (top) 32-bit integer input
* ALUin2: second (bottom) 32-bit integer input
* ALUcontrol: control input, with possibile input values:
*
* control control function in C
* (bin) (dec)
* ---------------------------------------------------
* 000 (0) AND in1 & in2
* 001 (1) OR in1 | in2
* 010 (2) add in1 + in2
* 110 (6) subtract in1 - in2
* 111 (7) set on lt in1 < in2
*
* Note: Results are undefined for any other value of ALUcontrol.
*
* Outputs:
* ALUresult: the 32-bit result as defined by the hardware
* ALUZero: either 1 or 0, depending on whether ALUresult == 0 or != 0
*
* Discussion: the ALU is pure combinational logic, without state
* elements. The ALU operates as shown in Section 4.5.
* Note that the "zero" output is a "1" in case the result
* of the ALU operation is all zeros (32 "0" bits).
*/
/* mipsRegFile.h: header file for the Register File simulation function */
void Reg(int ReadReg1, int ReadReg2, int WriteReg,
unsigned int WriteData, int RegWriteControl,
unsigned int *ReadData1, unsigned int *ReadData2);
/* Reg function: simulate MIPS register file
* Inputs:
* ReadReg1: 0-31 (5 bits), the first register number to read
* ReadReg2: 0-31 (5 bits), the second register number to read
* WriteReg: 0-31 (5 bits), the register number to write
* WriteData: 32-bit integer to write to WriteReg
* RegWriteControl: 1 or 0, according to whether the WriteReg is
* written with WriteData (1), or not (0)
*
* Outputs:
* ReadData1: 32-bit contents of ReadReg1
* ReadData2: 32-bit contents of ReadReg2
*
* Discussion: This function contains an array of 32 32-bit integers,
* initially all zero. The declaration for this array should be
* buried within the source file "mipsRegFile.c". Since
* we are using separate files, you don't have direct access to
* the registers, but only through the function "Reg" and its inputs.
* For this reason, you can use a function like the "dumpRegFile"
* below to help with debugging.
*/
/* dumpRegFile function: print the 32 registers in a convenient form. */
void dumpRegFile(void);
pandora% testALU 00000011 00000044 Inputs: ALUin1: 0x00000011, ALUin2: 0x00000044, ALUcontrol: AND or 0 Results: ALUresult: 0x00000000, ALUZero: 0x1 Inputs: ALUin1: 0x00000011, ALUin2: 0x00000044, ALUcontrol: OR or 1 Results: ALUresult: 0x00000055, ALUZero: 0x0 Inputs: ALUin1: 0x00000011, ALUin2: 0x00000044, ALUcontrol: add or 2 Results: ALUresult: 0x00000055, ALUZero: 0x0 Inputs: ALUin1: 0x00000011, ALUin2: 0x00000044, ALUcontrol: sub or 6 Results: ALUresult: 0xffffffcd, ALUZero: 0x0 Inputs: ALUin1: 0x00000011, ALUin2: 0x00000044, ALUcontrol: slt or 7 Results: ALUresult: 0x00000001, ALUZero: 0x0
pandora% testReg 2 3 4 00001111 1 Input: ReadReg1:2, ReadReg2:3, WriteReg:4, WriteData:0x00001111, RegWriteCtrl:1 Registers: 0: 0x00000000, 1: 0x00000000, 2: 0x00000000, 3: 0x00000000, 4: 0x00001111, 5: 0x00000000, 6: 0x00000000, 7: 0x00000000, 8: 0x00000000, 9: 0x00000000, 10: 0x00000000, 11: 0x00000000, 12: 0x00000000, 13: 0x00000000, 14: 0x00000000, 15: 0x00000000, 16: 0x00000000, 17: 0x00000000, 18: 0x00000000, 19: 0x00000000, 20: 0x00000000, 21: 0x00000000, 22: 0x00000000, 23: 0x00000000, 24: 0x00000000, 25: 0x00000000, 26: 0x00000000, 27: 0x00000000, 28: 0x00000000, 29: 0x00000000, 30: 0x00000000, 31: 0x00000000, Output: 00000000, 00000000 4 5 1 00002222 1 Input: ReadReg1:4, ReadReg2:5, WriteReg:1, WriteData:0x00002222, RegWriteCtrl:1 Registers: 0: 0x00000000, 1: 0x00002222, 2: 0x00000000, 3: 0x00000000, 4: 0x00001111, 5: 0x00000000, 6: 0x00000000, 7: 0x00000000, 8: 0x00000000, 9: 0x00000000, 10: 0x00000000, 11: 0x00000000, 12: 0x00000000, 13: 0x00000000, 14: 0x00000000, 15: 0x00000000, 16: 0x00000000, 17: 0x00000000, 18: 0x00000000, 19: 0x00000000, 20: 0x00000000, 21: 0x00000000, 22: 0x00000000, 23: 0x00000000, 24: 0x00000000, 25: 0x00000000, 26: 0x00000000, 27: 0x00000000, 28: 0x00000000, 29: 0x00000000, 30: 0x00000000, 31: 0x00000000, Output: 00001111, 00000000 1 4 6 77777777 0 Input: ReadReg1:1, ReadReg2:4, WriteReg:6, WriteData:0x77777777, RegWriteCtrl:0 Registers: 0: 0x00000000, 1: 0x00002222, 2: 0x00000000, 3: 0x00000000, 4: 0x00001111, 5: 0x00000000, 6: 0x00000000, 7: 0x00000000, 8: 0x00000000, 9: 0x00000000, 10: 0x00000000, 11: 0x00000000, 12: 0x00000000, 13: 0x00000000, 14: 0x00000000, 15: 0x00000000, 16: 0x00000000, 17: 0x00000000, 18: 0x00000000, 19: 0x00000000, 20: 0x00000000, 21: 0x00000000, 22: 0x00000000, 23: 0x00000000, 24: 0x00000000, 25: 0x00000000, 26: 0x00000000, 27: 0x00000000, 28: 0x00000000, 29: 0x00000000, 30: 0x00000000, 31: 0x00000000, Output: 00002222, 00001111