CS 2511 Computer Organization I Recitation Spring'05

Lab 6

Assigned : 03/07 (CS2511.001)
03/09 (CS2511.002)

Due : 03/21 (CS2511.001)
03/23(CS2511.002)

Objectives

Learn the function of multiplexers and decoders.
Use multiplexers and decoders to implement a logic function.

Resources

Units 8 and 9 from the textbook.
Contact the TA if you have any questions.

Problem Description (total 50 pts)

(1) Design an 8-4-2-1 BCD code converter to drive a seven-segment indicator. The four inputs to the converter circuit (A, B, C and D in the following figure) represent an 8-4-2-1 binary-coded decimal digit (D is the most significant bit, A is the least significant bit). Assume that only input combinations representing the digits 0 through 9 can occur as inputs, so that the combinations 1010 through 1111 are don't cares.

(a) Complete the truth table for all 7 outputs (7pts)

(b) Design the circuit according to the following requirements: (35pts)

Implement output function for a and b using 74150 (16:1 mux)
Implement output function for c and d using 74151 (8:1 mux)
Implement output function for e using 74153 (dual 4:1 mux)+ 74157 (2:1 mux)
Implement output function for f using 74154 + NAND gates from discrete component library
Implement output function for g using two 74138 + 74157 + NAND gates

Note: Refer to Data sheet for 74xx Series ICs and sample solutions

(2) Pick any one input that has a static-1 hazard and demonstrate it using simulations. Choose appropriate input combination and show the output
signal with a glitch (print out the timing chart). (sample timing file) (8pts)

Decimal digit
0

1

2

3

4

BCD code
0000

0001

0010

0011

0100

Decimal digit
5

6

7

8

9

BCD code
0101

0110

0111

1000

1001

Hand-in Requirements (Deliverables)

Staple all your hand-ins as required in problem description to form a single packet. Write your name, course and recitation section number on the front.