| Lab 8 |
Assigned : 04/04 (CS2511.001)
04/06 (CS2511.002) |
Due : 04/11 (CS2511.001)
04/13(CS2511.002) |
Objectives
- Design up-down counter using flip-flops
- Test your design using Logicworks.
Resources
Units 11 and 12 from the textbook.
Contact the TA if you
have any questions.
Problem Description (total 40 pts)
Design an up-down counter which counts in the following sequence (C B A): 000, 100, 001,
111, 110, 101, (repeat) 000, ..., when the control bit U=1, and counts the reverse sequence when the control bit U=0.
Use clocked D flip-flops and AND, OR, NOT gates to implement it. You should write down Excitation Table, State Table, State Graph, K-Map and its simplified Boolean equation (MSOPs) for each remapped flip-flop input, draw the circuit (using virtual connection) and print it out, and verify the circuit in Logicworks.
Hand-in Requirements (Deliverables)
Staple all your hand-ins as required in problem description to form a
single packet. Write your name, course and recitation
section number on the front.