CS5513, Computer Architecture, Spring 2019
Course Objectives and Schedule

Course Objectives

  1. Understand the design of instruction sets and the impact of this design.
  2. Understand the basic design of functional units to support instruction sets.
  3. Understand the design of a pipelined CPU and memory hierarchy.
  4. Understand of trade-offs in modern CPU design including issues affecting superscalar and speculative executions.
  5. Understand the basic designs of parallel processors.
  6. Experience with processor simulation to study microarchitecture features.

Syllabus

The following syllabus gives you a rough idea of the time spent on each topic. The syllabus may change depending on how quickly or slowly we move. Regardless, the tests and exams will be on the dates shown. Make any travel plans accordingly.

Week Topics Assignments & Exams Supplement Materials
Week 1: 01/14 Course introduction;

Instruction Set Architecture: ISA design;
Week 2: 01/21 Instruction Set Architecture: impact on design;

Computer Arithmetic: binary representations;
Week 3: 01/28 Labor Day;

Computer Arithmetic: math in binary;

Computer Arithmetic: transistors;

Assignment 1: Instruction Set due.

Week 4: 02/04 Computer Arithmetic: ALU design;

Performance Models and Metrics

Assignment 2: Assembly Programming Due;
Week 5: 02/11 Instruction Level Parallelism: Pipelines;

Instruction Level Parallelism: Superscalar 		Assignment 3: ALU design Due;
Week 6: 02/18 Instruction Level Parallelism: Branch Prediction;

Performance and Security Impacts of Speculative Execution 		Midterm Exam 1 on 02/20th, in class.
Week 7: 02/25 Instruction Level Parallelism: Out-of-Order;

Instruction Level Parallelism: CMP and SMT; 		Assignment 4: Pipelines and Superscalar Due
Week 8: 03/04 TLB and Virtual Memory, part 1 Assignment 5: Branch Prediction due;

Week 9: 03/11 Spring Break;

Assignment 6: TLB due;

Week 10: 03/18 TLB and Virtual Memory, part 2;

Cache: Basec concepts;

Project Information; 		Assignment 7: Cache 1 due.
Week 11: 03/25 Cache: Replacement Policies;

Midterm Exam 2 on 03/27th, in class
Week 12: 04/01 Cache: Other Design Concerns;

Memory Controller and DRAM, part 1; 		Project Progress Report.
Week 13: 04/08 Memory Controller and DRAM, part 2; Assignment 8: Cache 2 due.
Week 14: 04/15 Storage and Interconnects; Parallel Processor: GPU part 1;

Assignment 9: DRAM due;
Week 15: 04/22 Parallel Processor: GPU part 2;

Parallel Processor: ASIC and FPGA 		Project Due.
Week 16: 04/29 Parallel Processor: NUMA

Wrap-up
Final Exam May 8th, 2019, 6:00-8:30 pm.